Hi, my name is
Computer Science student at UCL with industry experience at Arm. Passionate about systems programming, compilers, and building things that matter.
I'm a Computer Science student at University College London with a First Class standing (84% overall). My journey in tech spans from low-level systems programming to full-stack web development.
Most recently, I led backend development on Cresco, a RAG-powered AI assistant for UK small-scale farmers, as part of a UCL IXN project sponsored by NTT DATA. In summer 2025, I interned at Arm in Cambridge on next-generation interrupt controller systems — co-building test frameworks that reduced per-test runtime by 60%.
I'm driven by the intersection of hardware and software — from writing compilers in C++ and contributing to MLIR-based compiler frameworks, to crafting React frontends and SystemVerilog testbenches. I believe great engineers understand every layer of the stack.
NTT DATA (via UCL IXN, COMP0016)
Arm — Central Engineering, Systems
GETAC
Contributed to xDSL, an open-source Python-based MLIR dialect framework. Landed
2 merged PRs: a RISC-V XOR canonicalization pass ((x^a)^a → x) and IR test
coverage improvements with clearer error messages.
Building a C compiler from scratch using Bison and Flex, generating Koopa IR as intermediate representation with a backend targeting RISC-V assembly.
Custom LLVM optimization passes (including loop analysis) built on top of LLVM's analysis framework. Completed the Kaleidoscope frontend tutorial end-to-end (lexer, parser, IR, JIT).
University College London
September 2024 – Present
University College London
September 2023 – June 2024
I'm currently looking for new opportunities and my inbox is always open. Whether you have a question, a project idea, or just want to say hello — feel free to reach out!
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